- Previous Close
262.54 - Open
262.31 - Bid 256.35 x 100
- Ask 257.05 x 200
- Day's Range
255.87 - 263.23 - 52 Week Range
230.09 - 328.99 - Volume
1,249,058 - Avg. Volume
2,112,822 - Market Cap (intraday)
70.414B - Beta (5Y Monthly) 1.05
- PE Ratio (TTM)
66.67 - EPS (TTM)
3.85 - Earnings Date Apr 21, 2025 - Apr 25, 2025
- Forward Dividend & Yield --
- Ex-Dividend Date --
- 1y Target Est
317.85
Cadence Design Systems, Inc. provides software, hardware, and other services worldwide. The company offers functional verification services, such as Jasper, a formal verification platform; Xcelium, a parallel logic simulation platform; Palladium, an enterprise emulation platform; and Protium, a prototyping platform for chip verification. It also provides digital IC design and sign off products, including Genus synthesis and Joules RTL power solutions, as well as Modus DFT software solution to reduce systems-on-chip design-for-test time; physical implementation tools, such as place and route, optimization, and performing sign-off checks for manufacturing; and Innovus implementation system, a digital IC design and signoff solution. In addition, the company offers custom IC design and simulation, such as Virtuoso Studio, a solution platform for custom, analog, mixed-signal, photonics, and RF semiconductors; and system design and analysis products, a Multiphysics platform that helps in design and simulate electronics and entire systems in electromagnetic, thermal, structure, computational fluid dynamics, molecular, PCB and packaging, mechanical, and structural analysis. Further, it provides semiconductor IP product for design architectures; Functional Verification; digital ic design and signoff; EDA product that addresses the design and verification for semiconductor chips and manufacturing process technologies; and verification IP with memory models to emulate and model the expected behavior and interaction of standard industry system interface protocols. Additionally, it offers services related to methodology, education, and hosted design solutions, as well as technical support and maintenance services. It serves consumer, hyperscale computing, 5G communications, mobile, automotive, aerospace and defense, industrial, and life science industries. Cadence Design Systems, Inc. was incorporated in 1987 and is headquartered in San Jose, California.
www.cadence.com12,700
Full Time Employees
December 31
Fiscal Year Ends
Sector
Industry
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Trailing total returns as of 3/28/2025, which may include dividends or other distributions. Benchmark is S&P 500 (^GSPC) .
YTD Return
1-Year Return
3-Year Return
5-Year Return
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Statistics: CDNS
View MoreValuation Measures
Market Cap
70.41B
Enterprise Value
70.21B
Trailing P/E
66.67
Forward P/E
38.17
PEG Ratio (5yr expected)
2.70
Price/Sales (ttm)
15.14
Price/Book (mrq)
15.07
Enterprise Value/Revenue
15.13
Enterprise Value/EBITDA
42.12
Financial Highlights
Profitability and Income Statement
Profit Margin
22.74%
Return on Assets (ttm)
11.86%
Return on Equity (ttm)
26.13%
Revenue (ttm)
4.64B
Net Income Avi to Common (ttm)
1.06B
Diluted EPS (ttm)
3.85
Balance Sheet and Cash Flow
Total Cash (mrq)
2.78B
Total Debt/Equity (mrq)
56.20%
Levered Free Cash Flow (ttm)
1B