Japan’s Chip Equipment Maker Disco Catches AI Fever
Artificial intelligence requires faster and faster chips, but it is getting more expensive to keep making them. That is why advanced packaging has become the latest hot thing in the semiconductor industry, to the benefit of many including a lesser-known Japanese equipment maker.
Chip packaging—putting chips into protective casing and connecting them with power and other components—used to be of relatively secondary importance. Much more effort went into making chips themselves faster and smaller. Most chip packaging, the final step in semiconductor fabrication, is outsourced to companies specializing in assembly and testing, with cost as a key concern.
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As such, it isn’t a particularly sexy business. For example, Taiwan’s ASE Technology, the world’s largest chip-packaging and testing company, had a gross profit margin of 16% last year, compared with 54% for Taiwan Semiconductor Manufacturing Co.
But with chip size approaching atomic level, it is getting more expensive to shrink chips much further. So the recent AI boom has put advanced packaging in the spotlight. The idea is simple: Integrating different chips closely together in a package can reduce data-transfer time and energy consumption.
One particular use case is in memory chips, especially with the explosion of demand from AI. So-called high-bandwidth memory, or HBM, stacks together layers of memory chips and puts them close to the central processor, speeding up data transfer.
Nvidia’s H200 AI chip, for example, integrates six HBMs with its own graphic processing unit. Shares of the South Korean memory-chip maker SK Hynix have nearly tripled in value since the end of 2022. It has been an early leader in HBM, moving ahead of Samsung Electronics and Micron Technology.
Advanced packaging accounted for 9% of global semiconductor revenue in 2023, according to Morgan Stanley. The bank expects that could rise to 13%, or $116 billion, by 2027.
Given that the process requires the integration of different types of chips, it is becoming more central to the chip-fabrication process. Foundries that make chips have to work with other chip makers to design the packaging.
That is partly why TSMC has been a leader with its Chip-on-Wafer-on-Substrate, or CoWoS, technology. The limited capacity of this advanced-packaging technology has been a bottleneck in producing more AI chips.
Samsung and Intel have similar technologies. SK Hynix has joined with TSMC to work on next-generation HBM and advanced-packaging technology.
One company that has been partying hard in the background is the Japanese semiconductor equipment maker Disco. The company makes tools to grind and dice the silicon wafers that chips are printed on.
Thinner wafers become more important when chips are stacked together.
Morgan Stanley estimates around 40% of Disco’s revenue came from advanced packaging. Its stock has more than quintupled since the end of 2022.
It might be harder to keep making chips smaller, but more-innovative ways to package them could still open many opportunities.
Write to Jacky Wong at jacky.wong@wsj.com